NOVELTY - The cell comprises a photosensitive element (1) such as diode, the first addressable means in the form of a transistor (2) for activation/deactivation of the photosensitive element after an exposition phase, the second addressable means in the form of transistors (9,10) in series for extracting a luminosity signal generated by the photosensitive element, the third addressable means in the form of a shutter transistor (6) for transferring the luminosity signal to the second addressable means, the storage means in the form of stray capacitances (cp1, cp2, cp3) for conserving the luminosity signal between the exposition phase and the instant when the cell is addressed for activation, and the fourth addressable means in the form of a pull-back transistor (14) for discharging the storage means after a reading phase.    USE - In active cells used as photo-sensors and devices containing sets of cells laid out in addressable matrices and used for imaging, the devices which are implemented in CMOS technology.    ADVANTAGE - The charge accumulation node is near totally insulated from the rest of the circuit after the exposition phase, without increasing the size of cell and decreasing practically to null the parasitic accumulation. The spectral characteristics of the photosensitive element are not altered.    DETAILED DESCRIPTION - A set of cells laid out according to an addressable matrix is subjected to successive operating cycles consisting at least of an exposition phase for detecting the quantity of impinging light, and an exploration phase in the course of which the information regarding the luminosity is extracted. The first, second, third, and fourth addressable means are implemented in the form of semiconductor components integrated in a substrate of predetermined conductivity type, wherein the third and fourth addressable means are placed in a well prepared in the substrate, where the well is of conductivity type opposite to that of the substrate, and where the photosensitive element is implemented. The substrate is of p-type conductivity, and the well is of n-type conductivity. In the second embodiment which is dual to the first, the substrate is of n-type conductivity, and the well is of p-type conductivity. A diffusion region is implanted in the well and connected to a source of biasing voltage, preferably tunable, where the region is of the same type conductivity as the well. In the third embodiment, the third addressable means consist of a set of transistors connected in series and each controlled by a constant voltage.    DESCRIPTION OF DRAWING(S) - The drawing is a circuit diagram of the cell.    Photosensitive element (1)    Transistors (2,6,9,10,14)    Control terminal (3)    Supply terminal (4)    Circuit nodes (5,8)    Shutter control (7)    Output line (12)    Read control (13)    Discharge control (15)    Well indicating conductor (20)    Intermediate connection (25)    Additional supply terminal (26)    Stray capacitances (cp1, cp2, cp3)