NOVELTY - Usable surface area of a semiconductor wafer is increased by selecting a strip thickness of division of the wafer into strips, selecting a technique to cut the wafer into strips at an angle to a planar surface, cutting the wafer using the technique, and separating the strips from each other. The combined strip thickness and width of cut wafer is less than the wafer thickness.    USE - For increasing the usable surface area of a semiconductor wafer for producing solar cells used with optical reflectors.    ADVANTAGE - Provides a greater surface area of solar cell per unit length of ingot material compared to prior art methods. It allows a very simple and highly effective static concentrator designs to be implemented, which allow concentration of sunlight by a factor of two or more. A solar cell fabrication process can be carried out while the strips remain attached to the wafer. Monolithic interconnection results naturally from the processes of the invention. Cells can be connected in series, giving a high voltage and small current device.    DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for:    (1) a method for processing a semiconductor wafer having a planar surface comprising creating parallel elongated slots at least partly through the wafer so that the combined width of the slots and width between the slots is less than the wafer thickness to create a series of semiconductor strips, separating the strips from each other, and orienting the strips so that their faces which were previously at an angle to the planar surface are exposed to form new planar surface;    (2) a method for producing silicon solar cells comprising forming parallel slots into a silicon substrate, where the slots extend at least partially through the substrate to create a series of silicon strips, separating the strips from each other, and fabricating solar cells from the strips;    (3) a silicon solar cell prepared by the above process; and    (4) a process for decreasing the reflectivity of a surface of a semiconductor material comprising applying a layer of protective substance on the surface, and contacting the layer and semiconductor material with an etchant capable of etching the material faster than the protective material.    The etchant makes contact with the semiconductor material at least through apertures of the layer to etch the material but not the protective substance.    DESCRIPTION OF DRAWING(S) - The drawing shows a schematic diagram showing bottom view of a silicon wafer.    strips (1)    slots (2)    wafer (3)    frame (5)