NOVELTY - Fabricating an electronic device, involves wafer bonding a first semiconductor material to a second semiconductor material (202), at a temperature below 550 degrees C to form a device quality heterojunction (206) between the semiconductor materials, where the second semiconductor material is a III-nitride and the first semiconductor material has a different material composition from the second semiconductor material.    USE - For fabricating electronic device such as heterojunction bipolar transistor and field effect transistor (claimed), microwave, power electronics, solar cells, light emitting diodes (LED), and photo-detectors.    ADVANTAGE - The method uses low temperature bonding techniques, materials with dissimilar thermal expansion coefficients such as silicon, germanium, and gallium nitride can be bonded to form heterojunctions that cannot be readily grown with high quality using conventional epitaxial techniques. The wafer bond between semiconductor and the III-nitride to form the device quality heterojunction, can reduce thermal mismatch strain, dislocation distribution and impurity distribution in the semiconductor material and III-nitride material.    DETAILED DESCRIPTION - Fabricating an electronic device, involves wafer bonding a first semiconductor material to a second semiconductor material (202), at a temperature below 550 degrees C to form a device quality heterojunction (206) between the semiconductor materials, where the second semiconductor material is a III-nitride and the first semiconductor material has a different material composition from the second semiconductor material. The method further involves forming at least one injector region in the first semiconductor material prior to, or subsequent to, the wafer bonding step, where the first semiconductor material is not a III-nitride. The first semiconductor material has superior properties for the injector region as compared to the second semiconductor material. The superior properties are higher speed of the injector region, higher electron mobility and/or lower access resistance. The first semiconductor material has a different lattice constant, thermal properties, and crystalline structure as compared to the second semiconductor material. The method further involves introducing indium, indium phosphide (InP), or a III-P or III-As compound on a bonding face of the first semiconductor material or second semiconductor material, prior to the wafer bonding step. The device contains source region, semiconducting region, drift region, active region and a wafer bond. The active region is collector, drain, channel, light emitting region or light scattering region. An INDEPENDENT CLAIM is included for an electronic device, comprising a semiconductor material including injector regions; a III-nitride material including collectors (204a, 204b), drain or active regions; and a device quality heterojunction, where the semiconductor material is not a III-nitride, and the injector regions have superior properties as compared to III-nitride injector regions.    DESCRIPTION OF DRAWING(S) - The figure shows a schematic view of the wafer bonded silicon/silicon germanium/gallium nitride dual heterojunction bipolar transistor (DHBT).    Dual heterojunction bipolar transistor (200)    III-Nitride material (202)    Collector region (204a, 204b)    Heterojunction (206)    Emitter region (210)    Base region. (212)