NOVELTY - A solar cell device comprises a p-type silicon substrate (114) having top-side and back-side; an n+ layer (104) formed on the top-side of p-type silicon substrate; a silicon nitride anti-reflective (AR) layer (106) positioned on top-side of n+-layer; i-type amorphous silicon layer having front-side and back-side; a p-type amorphous silicon layer having a front-side and a back-side; and a transparent conducting oxide layer having a front-side and back-side.    USE - For producing electricity; and in orbiting space satellites, remote telecommunication repeaters, fiber optic amplifiers, remote street signs, telephone booths, outdoor lighting, homes, businesses, utility scale power generation.    ADVANTAGE - The solar cell device has superior resistance to LID, superior bulk lifetimes, superior fill factor, superior open circuit voltage, and superior short circuit current density; superior blue response, superior series resistance, superior shunt resistance, superior junction leakage current density, superior bulk lifetime, superior back-surface field, superior emitter saturation current density, superior base saturation current density, superior grid design, gridline width, and gridline shrinkage, and final metal gridline resistivity.    DETAILED DESCRIPTION - A solar cell device comprises a p-type silicon substrate (114) having a top-side and a back-side, where the bulk lifetime is 20-2500 mu s; an n+ layer (104) formed on the top-side of the p-type silicon substrate; a silicon nitride anti-reflective (AR) layer (106) positioned on the top-side of the n+-layer; a several of Ag contacts positioned on portions of the silicon nitride AR layer, where the Ag contacts are in electronic communication with the n+ layer; an i-type amorphous silicon layer having front-side and back-side, where the front-side of i-type layer is disposed on the back-side of the p-type silicon substrate; a p-type amorphous silicon layer having a front-side and a back-side, where the front-side of the p-type layer is disposed on the back-side of the i-type amorphous silicon substrate; and a transparent conducting oxide layer having a front-side and back-side, where the transparent conducting oxide layer is disposed on the back-side of the p-type layer; where the device has a fill factor (FF) of 0.75-0.85, an open circuit voltage (Voc) of 600-50 mV, and a short circuit current density (Jsc) of 28-36 mA/cm2. The device further comprises a fired screened printed aluminum grid disposed on the back-side of the transparent conducting oxide layer. The p-silicon substrate is selected from edge defined fed grown (EFG) Si ribbon, string Si ribbon, float-zone (FZ) Si, Cz Si, and multi-crystalline silicon (mc-Si). The p-type silicon substrate includes a co-fired p-type gallium doped silicon substrate. The p-gallium doped silicon substrate comprises Cz Si.    DESCRIPTION OF DRAWING(S) - The figure shows silicon solar cell device.    Solar cell device (100a)    n+-Type emitter layer (104)    Anti-reflective layer (106)    Ag contacts (110)    p-Silicon substrate (114)