NOVELTY - A bottom gate thin film transistor (TFT) comprises bottom gate electrode (12) formed on substrate (10); gate insulating layer (14) forming on substrate covering the bottom gate electrode; amorphous semiconductor layer, N-type semiconductor layer and electrode layer sequentially formed on gate insulating layer; electrode region and N-type semiconductor layer region sequentially etched on bottom gate electrode; and laterally grown polycrystalline channel region (16C) formed by melting and subsequent crystallization of amorphous semiconductor layer region.    USE - A bottom gate thin film transistor. Uses include but are not limited to active matrix LCD, active matrix organic LED, solar battery and semiconductor memory device.    ADVANTAGE - The polycrystalline channel region having large grain size can be formed simply and easily without requiring additional operations. A position of polycrystalline channel region can be easily determined and controlled. The laterally grown polycrystalline channel region can be easily formed. Since the laterally grown polycrystalline channel region may have high mobility and low defect density, a bottom gate TFT having improved field effect mobility can be manufactured.    DETAILED DESCRIPTION - A bottom gate TFT comprises bottom gate electrode (12) formed on substrate (10); gate insulating layer (14) forming on substrate covering the bottom gate electrode; amorphous semiconductor layer, N-type semiconductor layer and electrode layer sequentially formed on gate insulating layer; electrode region and N-type semiconductor layer region sequentially etched on bottom gate electrode to expose amorphous semiconductor layer region; and laterally grown polycrystalline channel region (16C) formed by melting and subsequent crystallization of amorphous semiconductor layer region. The amorphous semiconductor layer comprises silicon or silicon germanium. The N-type semiconductor layer includes amorphous silicon doped with N-type impurities or polycrystalline silicon doped with N-type impurities. The gate insulating layer includes silicon dioxide or silicon nitride. The bottom gate electrode and electrode layer include aluminum, chromium, copper or molybdenum. The substrate is transparent substrate including glass or plastic.    DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of a bottom gate TFT.    Substrate (10)    Bottom gate electrode (12)    Gate insulating layer (14)    Polycrystalline channel region (16C)    Source electrode (20S)