NOVELTY - The mono-crystalline silicon III-V semiconductor device comprises a silicon (111) substrate (312) comprising a single crystal of silicon with a (111) orientation for a major top surface, a coincidence-site lattice (CSL) layer (320) grown over the major top surface of the silicon substrate, a tunnel diode layer grown over the CSL layer, a top cell layer grown over the tunnel diode layer, and a diffusion layer in the silicon substrate under the CSL layer. The CSL layer is an III-V epitaxial layer, and is a continuation of the single crystal of silicon in an III-V compound material.    USE - The mono-crystalline silicon III-V semiconductor device is useful in a multi-junction device such as solar cell (claimed), lasers, and light-emitting diodes.    ADVANTAGE - The mono-crystalline silicon III-V semiconductor device provides improved efficiency, increased resistance and density to the solar cell, and reduces the lattice mismatch and dislocation defects in the solar cell.    DETAILED DESCRIPTION - The mono-crystalline silicon III-V semiconductor device comprises a silicon (111) substrate (312) comprising a single crystal of silicon with a (111) orientation for a major top surface, a coincidence-site lattice (CSL) layer (320) grown over the major top surface of the silicon substrate, a tunnel diode layer grown over the CSL layer, a top cell layer grown over the tunnel diode layer, and a diffusion layer in the silicon substrate under the CSL layer. The CSL layer is a III-V epitaxial layer, is a continuation of the single crystal of silicon in a III-V compound material, and has the opposite doping polarity and a surface area of less than 5x 105 defects per cm2. The CSL layer and the silicon substrate both have the (111) orientation. The tunnel diode layer has a p+ doped layer and a n+ doped layer that are sufficiently thin and highly doped to enable reverse-biased current to flow vertically through the tunnel diode layer without damage to the device. The top cell layer has an n-doped layer and a p-doped layer, and forms a light-absorbing p-n diode that generates current when exposed to light of upper bandgap energy. The diffusion layer has an opposite n-type doping polarity as a doping polarity of the silicon substrate. The diffusion layer and the silicon substrate form a substrate light-absorbing p-n diode that generates current when exposed to light of lower bandgap energy. The upper bandgap energy is greater than the lower bandgap energy. The reverse-biased current is generated in both the top cell layer and in the silicon substrate when light is absorbed. A dopant of the diffusion layer is supplied by the CSL layer during growth of the CSL layer. The diffusion layer in the silicon substrate is formed when the CSL layer is grown. The p+ doped layer of the tunnel diode layer is present above the n+ doped layer of the tunnel diode layer. The p-doped layer of the top cell layer is present below the n-doped layer of the top cell layer. The silicon substrate is a p-type substrate. The CSL layer, the tunnel diode layer, and the top cell layer are all mono-crystalline epitaxial layers. The CSL is grown at a CSL growth temperature causing the CSL layer to grow horizontally across the major top surface of the silicon substrate to cover the major top surface before vertically growing. The growth is limited to a thickness less than 2 times a lattice constant of the CSL layer. The top cell layer and the tunnel diode layer are grown at diode growth temperatures that are higher than the CSL growth temperature. The diode growth temperature is sufficiently high to cause growth. The reverse-biased current in the tunnel diode layer flows by quantum-mechanical tunneling. The semiconductor device further comprises a second tunnel diode layer grown over the top cell layer, and a second top cell layer grown over the second tunnel diode layer. The second tunnel diode layer has a p+ doped layer and a n+ doped layer that are sufficiently thin and highly doped to enable reverse-biased current to flow vertically through the second tunnel diode layer without damage to the device. The second top cell layer has an n-doped layer and a p-doped layer, and forms a light-absorbing p-n diode that generates current when exposed to light of a second upper bandgap energy. The second upper bandgap energy is greater than the upper bandgap energy. The three light-absorbing junctions are formed and connected by the tunnel diode layer and the second tunnel diode layer. A plane of the major top surface of the silicon substrate passes through three corner atoms of a basic cube of a face-centered-cubic structure. The basic cube has exactly 6 outer surfaces. The major top surface is a vicinal surface that comprises terraces, which are atomically flat surfaces. An INDEPENDENT CLAIM is included for a multi-junction device such as solar cell.    DESCRIPTION OF DRAWING(S) - The diagram shows a 4-junction solar cell with silicon bottom supporting substrate.    Silicon substrate (312)    Coincidence-site lattice layer (320)    Upper tunnel diode (328)    Lower tunnel diode (322)    Upper-cell layer. (330)