TECHNOLOGY FOCUS - ELECTRONICS - Preferred Method: In fabricating a 3D thin-film semiconductor substrate, the template comprising a set of 3D inverted pyramidal surface features further comprises a set of at least two differently sized 3D inverted pyramidal surface features comprising a larger set of 3D inverted pyramidal surface features having a width in the range of approximately 50-500 microns and a smaller set of 3D inverted pyramidal surface features. The step of selectively forming through-holes in the epitaxial semiconductor layer further comprises selectively forming through-holes in the smaller set of 3D inverted pyramidal surface features on the epitaxial semiconductor layer. The step of selectively forming through-holes in the epitaxial semiconductor layer further comprises the steps of: coating the front surface of the epitaxial semiconductor layer with a masking layer; selectively coating the back surface of the larger set of 3D inverted pyramidal cavities substantially aligned along the (111) crystallographic plane of the epitaxial semiconductor layer with a masking layer; and anisotropically etching the epitaxial semiconductor layer to form see-through openings positioned on the back surface of the smaller set of 3D inverted pyramidal cavities on the epitaxial semiconductor layer. Also, selectively forming through-holes in the epitaxial semiconductor layer further comprises the steps of: coating the front surface and back surface of the epitaxial semiconductor layer with a hard masking layer; selectively coating the back surface of the larger set of 3D inverted pyramidal cavities substantially aligned along the (111) crystallographic plane of the epitaxial semiconductor layer with a masking layer; and anisotropically etching the epitaxial semiconductor layer to form see-through openings positioned on the back surface of the smaller set of 3D inverted pyramidal cavities on the epitaxial semiconductor layer. Selectively forming through-holes in the epitaxial semiconductor layer further comprises selectively forming through-holes in the larger set of 3D inverted pyramidal surface features on the epitaxial semiconductor layer, where the step of selectively forming through-holes in the epitaxial semiconductor layer further comprises the steps of: coating the front surface and back surface of the epitaxial semiconductor layer with a hard masking layer; removing the hard masking layer positioned on the back surface of the larger set of 3D inverted pyramidal cavities on the epitaxial semiconductor layer; and anisotropically etching the epitaxial semiconductor layer to form see-through openings positioned on the back surface of the larger set of 3D inverted pyramidal cavities on the epitaxial semiconductor layer. Selectively forming through-holes in the epitaxial semiconductor layer further comprises selectively forming through-holes in the top surface areas aligned along a (100) crystallographic orientation plane on the epitaxial semiconductor layer. Selectively forming through-holes in the epitaxial semiconductor layer further comprises the steps of: coating the front surface and back surface of the epitaxial semiconductor layer with a hard masking layer; patterning a photoresist to define the top surface areas aligned along a (100) crystallographic orientation plane of the epitaxial semiconductor layer; anisotropically etching the epitaxial semiconductor layer to form see-through openings positioned on the top surface areas aligned along a (100) crystallographic orientation plane of the epitaxial semiconductor layer. Selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned liquid transfer coating process to selectively form the through-holes. The step of selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned liquid transfer coating roller coater to selectively etch the through-holes. The step of selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned liquid transfer coating liquid carrier to selectively etch the through-holes. The step of selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned mechanical plate lapping process to selectively form the through-holes. Selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned mechanical diaphragm lapping process to selectively form the through-holes. Selectively forming through-holes in the epitaxial semiconductor layer uses a self-aligned mechanical abrasive tape lapping process to selectively form the through-holes. The method further comprises forming the semiconductor template by anisotropically etching a semiconductor wafer to form 3D surface features comprising top surfaces areas substantially aligned along a (100) crystallographic plane of the semiconductor template and a set of inverted pyramidal cavities defined by sidewalls aligned along a (111) crystallographic plane of the semiconductor template. Furthermore, the method comprises: the step of in-situ emitter and base doping of the epitaxial semiconductor layer during epitaxial semiconductor growth and prior to the epitaxial semiconductor release; the step of emitter and base doping of the epitaxial semiconductor layer after epitaxial semiconductor growth and prior to the epitaxial semiconductor release; and the step of emitter and base doping of the epitaxial semiconductor layer after the epitaxial semiconductor release. Preferred Substrate: In the 3D thin-film semiconductor substrate, the set of selectively formed through-holes in the semiconductor substrate are positioned in the smaller set of 3D inverted pyramidal cavities on the semiconductor substrate or in the larger set of 3D inverted pyramidal cavities on the semiconductor substrate. The set of selectively formed through-holes in the semiconductor substrate are positioned on the top surface areas on the semiconductor substrate.