NOVELTY - The package has conductive pads that are arranged along a periphery of chip (30). A seal ring (32) has metal strips that are arranged within a space between the two adjacent conductive pads. Each metal strip is electrically connected to one of the two adjacent conductive pads. The conductive pads are provided with metal strips arranged within space between the adjacent conductive pads and within width. The metal strips are parallel to each other, and arranged far from the conductive pads with a gap.    USE - Chip package e.g. image sensor package such as complementary metal oxide semiconductor device package and charge-coupled device (CCD) package. Can also be used in active or passive components, electronic components such as optoelectronic devices, micro electro mechanical systems (MEMS), micro fluidic systems, and physical sensors for detecting heat, light, or pressure, and wafer level chip scale packaging (WLCSP) process applied to package semiconductor chips such as image sensors, solar cells, radio frequency (RF) circuits, accelerators, gyroscopes, micro actuators, surface acoustic wave devices, pressure sensors, and ink printer heads.    ADVANTAGE - Since the seal ring has metal strips that are arranged within space formed between the two adjacent conductive pads and electrically connected to one of the two adjacent conductive pads, the space occupied by the sealing ring in the wafer area is reduced effectively, so that the amount of dies formed on the wafer is increased efficiently. Since the stress produced from the cutting process is passed along the extended channel between the two stress barriers to enter the package, the direct stress passing from the outside gap to the inside gap is prevented, so that the cracks formed and extended to the inner side of the chip is prevented effectively. The conductive pad is not etched and the contact surface of the conductive pad is exposed to be in contact with the conductive trace layer to form the L-shaped contact, the damage to the sealing ring formed from the conductive pads and generation of metal strips during the fabrication process is prevented, so that an effective sealing ring is formed efficiently.    DESCRIPTION OF DRAWING(S) - The drawing shows a top view of the sealing ring structure of the chip package.    Line area (3B)    Chip (30)    Seal ring (32)    Scribe line (c)