NOVELTY - The method involves providing a semiconductor substrate (110) having two surfaces (112) and a through-hole connecting the first surface to the second surface. An electro-coat polymer layer (130) is electroplated on the surfaces and an inner wall of the through-hole. A circuit layer (L) is formed on the electro-coat polymer layer by patterning the polymer layer that exposes portions of the surfaces and by electroplating a conductive layer on an electroless plating metal seed layer, where the circuit layer extends from the first surface to the second surface via the inner wall of the hole.    USE - Method for manufacturing an interposer that is used to carry an electronic chip i.e. LED chip, electrically connecting to a circuit layer (all claimed). Can also be used for active or passive device, printed circuit board, or electronic component with digital or analog circuit e.g. opto electronic device, micro electro mechanical system (MEMS) and micro fluidic system, and physical sensor for detecting heat, light, or pressure, and semiconductor chip such as image sensor device, solar cell, radio frequency (RF) circuit, accelerator, gyroscope, micro actuator, surface acoustic wave device, pressure sensor, ink printer head and/or power module.    ADVANTAGE - The method enables forming a seed layer by an electroless plating process with lower manufacturing cost, thus effectively reducing manufacturing cost of the interposer. The method enables patterning electroless plating metal seed layer such that the pattern draws back from openings to avoid shortage between electrical devices placed in the openings during subsequent processes and the electroless plating metal seed layer. The method allows a package encapsulant to be formed on the semiconductor substrate to encapsulate the chip and wires, which shields the chip and the wires from environmental moisture and contamination so as to avoid affecting the conductive properties of the chip and the wires.    DETAILED DESCRIPTION - The electro-coat polymer layer is a photosensitive polymer material. An INDEPENDENT CLAIM is also included for an interposer.    DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of a chip package.    Circuit layer (L)    Semiconductor substrate (110)    Surfaces (112)    Electro-coat polymer layer (130)    Wire (220)