NOVELTY - The method involves forming a conductive layer over a surface of a semiconductor die (58). An insulating layer is formed over a semiconductor wafer and the conductive layer. The semiconductor wafer is singulated to separate the semiconductor die. A carrier is provided. The semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. An interconnect structure is formed over the semiconductor die and the encapsulant, where another insulating layer is formed over the semiconductor die and encapsulant.    USE - Method for making a semiconductor device i.e. wafer level chip scale package (WLCSP) semiconductor device. Uses include but are not limited to LED, small signal transistor, resistor, capacitor, inductor, and power MOSFET, microcontroller, microprocessor, charged-coupled device (CCD), solar cell and digital micro-mirror device (DMD) in signal processing applications, high-speed calculations applications, electromagnetic signal transmitting and receiving applications, electronic device controlling applications, visual projections creating applications for TV displays in entertainment, communications applications, power conversion applications, networks applications, computers and consumer products, military applications, aviation applications, automotive applications, industrial controllers and office equipment.    ADVANTAGE - The method enables forming the interconnect structure over the semiconductor die and the encapsulant, so that the interconnect structure is electrically connected to the conductive layer and the insulating layer, thus providing stress relief during formation of the interconnect structure, and hence preventing the die from being damaged. The method enables a semiconductor die to be electrically connected through build-up interconnect structure, including conductive layer and bumps to external devices, so that stress relief is provided by the insulating layer, and hence reducing cracking, warpage and damage to the die during the formation of build-up interconnect structure. The method enables the insulating layer to be extended into channels, so that an edge of the sidewalls of semiconductor die adjacent to insulating layer is protected, thus reducing cracking and damage during formation of build-up interconnect structure.    DETAILED DESCRIPTION - The insulating layer is of silicon nitride. An INDEPENDENT CLAIM is also included for a semiconductor device comprising a semiconductor die.    DESCRIPTION OF DRAWING(S) - The drawing shows a perspective view of a printed circuit board (PCB) with different types of packages mounted to a surface.    Electronic device (50)    PCB (52)    Signal traces (54)    Dual in-line package (57)    Semiconductor die (58)    Multi-chip module (68)