NOVELTY - The method comprises forming a first insulating layer over a semiconductor wafer and contact pads of the wafer, removing a portion of the first insulating layer to expose a first portion of the contact pads, while leaving a second portion of the contact pads covered by the first insulating layer, forming an under bump metallization layer over the contact pads and the first insulating layer, forming cylindrical bumps over the under bump metallization layer, and forming a second insulating layer over the semiconductor wafer to cover the first insulating layer.    USE - The method is useful for making a semiconductor device such as an integrated semiconductor device including microcontrollers, microprocessors, charged-coupled devices, solar cells and digital micro-mirror, where the semiconductor device is useful in television displays, entertainment, communications, power conversion, networks, computers, consumer products, military applications, aviation, automotive, industrial controllers, and an office equipment.    ADVANTAGE - The method is capable of easily and economically making the semiconductor device with high speed operation, increased conductivity and improved reliability.    DETAILED DESCRIPTION - The method comprises forming a first insulating layer over a semiconductor wafer and contact pads of the wafer, removing a portion of the first insulating layer to expose a first portion of the contact pads, while leaving a second portion of the contact pads covered by the first insulating layer, forming an under bump metallization layer over the contact pads and the first insulating layer, forming cylindrical bumps over the under bump metallization layer, forming a second insulating layer over the semiconductor wafer to cover the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps and upper surface of the bumps, and removing a portion of the second insulating layer covering the upper surface of the bumps, while maintaining coverage of the second insulating layer over the sidewall of the bumps and the sidewall of the under bump metallization layer to provide structural support for the bumps and to prevent growth of inter-metallic compounds. The step of removing the portion of the second insulating layer includes maintaining a thickness of the second insulating layer at the sidewall of the bumps greater than one quarter of a height of the bumps, and maintaining coverage of the second insulating layer over the first insulating layer outside a footprint of the bumps. The bumps have a rectangular cross-section. The step of forming the under bump metallization layer includes forming an adhesion layer over the contact pads, forming a barrier layer over the adhesion layer, and forming a wetting layer over the barrier layer. The method further comprises forming conductive vias (226) through the semiconductor wafer having a portion that extends above a surface of the semiconductor wafer, forming the insulating layer over the semiconductor wafer and the conductive vias, removing a portion of the insulating layer covering an upper surface of the conductive vias, while maintaining the coverage of the insulating layer over a sidewall of the conductive vias to provide structural support for the conductive vias, depositing a liner layer including an insulating thin film and a conductive liner material in the vias, removing a portion of the liner layer to expose a conductive material, removing a portion of the insulating thin film over the conductive vias to form a conductive liner layer, forming a semiconductor die in the semiconductor wafer, singulating the semiconductor die, forming a conductive layer over and electrically connected to the conductive vias, forming an insulating layer over the semiconductor wafer and the conductive layer, removing a portion of the insulating layer over the conductive layer to expose a surface area of the conductive layer greater than a surface area of the upper surface of the conductive vias, forming a conductive interconnect structure having a height extending above a surface of the semiconductor wafer, forming an insulating layer over the conductive interconnect structure, removing a portion of the insulating layer covering an upper surface of the conductive interconnect structure while maintaining coverage of the insulating layer over a sidewall of the conductive interconnect structure, and forming redistribution layers over and electrically connected to the conductive interconnect structure. The step of forming the conductive vias includes forming a temporary substrate (214) over the semiconductor wafer, forming vias through the temporary substrate and the semiconductor wafer, depositing the conductive material in the vias, and removing the temporary substrate. The step of removing the portion of the insulating layer includes maintaining a thickness of the insulating layer greater than one quarter a height of the portion of the conductive vias that extends above the surface of the semiconductor wafer. The bumps are formed over the semiconductor wafer. The step of removing the portion of the insulating layer includes maintaining the thickness of the insulating layer greater than one quarter of the height of the conductive interconnect structure extending above the surface of the semiconductor wafer and maintaining the insulating layer outside a periphery of the conductive interconnect structure. An INDEPENDENT CLAIM is included for a semiconductor device.    DESCRIPTION OF DRAWING(S) - The diagram shows a schematic view of a semiconductor device.    Substrate (214)    Conductive vias (226)    Covering surface (230)    Support structure (236)    Insulation layer. (244)