NOVELTY - The method involves providing a first semiconductor die (128). A first interconnect structure (146) is provided. An encapsulant or molding compound (136) is deposited over the semiconductor die. A second structure (152) is formed over the semiconductor die, encapsulant and the first structure. The encapsulant is deposited over the first semiconductor die with the first structure extending through the encapsulant. A second semiconductor die (170) is placed over the first semiconductor die with the second semiconductor die connected to the second structure through the first structure.    USE - Method for making an integrated semiconductor device. Uses include but are not limited to make a microcontroller, microprocessor, charged-coupled device (CCD), solar cell and a digital micro-mirror device (DMD) used in network devices, computers, consumer products, industrial controllers and office equipments for an entertainment application communication application, power conversion application, military application, aviation application and an automotive application.    ADVANTAGE - The method enables forming the second structure over the semiconductor die, encapsulant and the first structure to reduce height of stacked semiconductor die in fan-out wafer level chip scale package to reduce size of bumps for reduced bump pitch and greater input/output (I/O) count and interconnect density, thus providing less expensive semiconductor device resulting in lower cost for consumers. The device provides a short electrical conduction path from active devices on the semiconductor die to conduction tracks on printed circuit board so as to reduce signal propagation distance, provide lower capacitance and improve overall circuit performance.    DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a semiconductor device.    DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of a stepped recess formed in an encapsulant.    Semiconductor dies (128, 170)    Encapsulant or molding compound (136)    Interconnect structures (146, 152)    Electrically conductive layer or redistribution layer (154)    Insulating or passivation layer (156)